As buried-gate MOS transistors do not have a normal gate sidewall spacer portion, the contact area on the active area can be maximized. Thus, the resistance can be lowered, thereby enhancing the current drive performance.
However, in the conventional buried-gate MOS transistors, optimization of electron mobility in the channel area or optimization of resistance in the contact area is not necessarily realized. Thus, the current drive performance is not necessarily enhanced in the conventional buried-gate MOS transistors.
In consideration of these problems, a semiconductor device which can further enhance the current drive performance is desired.